This application is based on Japanese Patent Application 2000-160896, filed on May 30, all of the content of which is incorporated in this application by reference.
1. Field of the Invention
The present invention relates to an analog-to-digital (A/D) converter circuit, and in particular, to a highly efficient A/D converter circuit suitable to process audio signals.
2. Description of the Related Art
In the prior art, the highly efficient A/D converter circuits of this kind include an A/D converter of sequential comparison type and over-sampling-type A/D converters such as an A/D converter of xcex94 modification and an A/D converter of xcex94 xcexa3 modification. FIG. 4 shows an A/D converter of sequential comparison type. The A/D converter includes a sample-and-hold (S/H) circuit 40, a digital-to-analog (D/A) converter circuit (DAC) 42, a sequential-comparison register 44, and a comparator 46 to compare an output signal from the sample-and-hold circuit 40 and an analog output signal from the D/A converter 42.
In the A/D converter circuit of sequential comparison type, an analog signal is inputted via an input terminal 100 to be held by the S/H circuit 40. On the other hand, an output signal from the sequential-comparison register 44 is fed to the DAC 42 to set its most-significant bit (MSB) to one, i.e., MSB=1. Thereafter, the comparator 46 compares the output signal from the DAC 42 with that from the S/H circuit 40. If the output signal from the DAC 42 is larger than that from the S/H circuit 40, the MSB is fixed to one (MSB=1). If the output signal from the DAC 42 is smaller than that from the S/H circuit 40, the MSB is fixed to zero (MSB=0). Resultantly, the first bit of the output signal from DAC 42 is determined. The comparator 46 continuously and repeatedly conducts the comparing operation for the output from the DAC 42 up to its least-significant bit (LSB). When the output signal from the S/H circuit 40 equals to that from the DAC 42, the digital output from the sequential-comparison register 44 operating in association with the DAC 42 is determined as the output from the A/D converter of sequential comparison type.
FIG. 5 shows, as a highly efficient A/D converter circuit of over-sampling type, constitution of an A/D converter of xcex94 modification of the prior art. The A/D converter circuit of FIG. 5 includes a comparator 50 which compares a reference voltage (a ground voltage in FIG. 5) with an output voltage from an adder circuit 52 to produce 1-bit digital data according to a result of the comparison, a D/A converter circuit 54 to receive the 1-bit digital data from the comparator 50, an analog integrator circuit 56 to integrate an analog output from the DAC 54, an inverter circuit 57 to invert a result of the integration from the analog integrator 56, and an adder circuit 52 to add an analog voltage signal inputted from an input terminal 101 to an inverted output signal from the inverter 57.
The A/D converter of xcex94 modification outputs 1-bit digital data of xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d depending on a result of comparison in the comparator 50, namely, depending on whether or not the reference voltage is higher than the output signal from the adder 52. The D/A converter 54 converts the 1-bit digital data into an analog signal. The analog integrator 56 integrates the analog signal and sends the integrated signal to the inverter 57. The inverter 57 inverts the integrated signal to produce an inverted signal. The adder 52 adds the inverted signal to the analog voltage signal inputted from the input terminal 101. The comparator 50 compares the sum signal resultant from the addition with the reference voltage. Until the analog input voltage from the input terminal 101 matches in a signal level with the output signal from the analog integrator 56, the comparator 50 repeatedly conducts the comparing operation. The 1-bit digital data sequentially outputted from the comparator 50 constitutes the converted output signal from the A/D converter of xcex94 modification.
FIG. 6 shows, as a highly efficient A/D converter circuit of over-sampling type, constitution of an A/D converter of xcex94 xcexa3 modification of the prior art. The A/D converter circuit of FIG. 6 includes a comparator 60 which compares a reference voltage (a ground voltage in FIG. 6) with an output voltage from an analog integrator circuit 66 to produce 1-bit digital data according to a result of the comparison, a DAC circuit 62 to receive the 1-bit digital data from the comparator 60 to convert the data into analog data, an inverter circuit 63 to invert an analog output from the DAC 62, an adder circuit 64 to add an analog voltage inputted from an input terminal 103 to an inverted output from the inverter 63, and an analog integrator circuit 66 to integrate an output signal from the adder 64.
In the A/D converter of xcex94 xcexa3 modification, the adder 64 adds the analog voltage inputted from the input terminal 103 to the inverted output from the inverter 63. The analog integrator 66 integrates a sum signal resultant from the addition. The comparator 60 compares the integrated output signal from the analog integrator 66 with the reference voltage signal. According to a result of the comparison, 1-bit digital data is outputted to an output terminal 104 and the DAC 62.
The DAC 62 converts the 1-bit digital data into an analog voltage. The inverter 63 inverts the integrated analog voltage to obtain an inverted signal. The adder 64 adds the inverted output signal to the analog voltage signal inputted from the input terminal 103. A signal resultant from the addition is inputted to the analog integrator 66.
Until the reference voltage matches in a signal level with the output signal from the analog integrator 66, the comparator 60 repeatedly conducts the comparing operation. The 1-bit digital data sequentially outputted from the comparator 60 constitutes the converted output from the A/D converter of xcex94 xcexa3 modification.
The A/D converter of sequential comparison required a sample-and-hold circuit. When such an A/D converter operates, for example, with a sampling frequency of 192 KHz to produce a 24-bit digital signal. It is necessary to conduct the sample-and-hold operation within 1/192xc3x97103=5.2 microseconds (xcexcs) and 24 sequential comparing operations within the same period of time. That is, there is required an A/D converter which produces a 24-bit output signal and which has a settling time of about 100 nanoseconds (ns). Such a circuit cannot be easily constructed.
Additionally, in the A/D converter of sequential comparison, the comparator compares the input analog voltage with the voltage about a half of the full-scale voltage of the D/A converter (the voltage value indicated by a bit corresponding to the MSB of the D/A converter) beginning at the MSB. Therefore, when resolution is increased, a monotonous feature is lost in the neighborhood of xe2x80x9cfull-scale-voltage/2 (center potential)xe2x80x9d or a code loss easily occurs. This consequently results in a problem that a highly efficient A/D converter of sequential comparison cannot be easily produced.
The over-sampling-type A/D converter such as an A/D converter of xcex94 modification or an A/D converter of xcex94 xcexa3 modification uses an analog integrator circuit. Therefore, to obtain a high signal-to-noise (S/N) ratio, large capacitor is required in the large-scale integrated (LSI) circuit of the converter. This leads to a problem. That is, to form such large capacitor, the LSI circuit becomes great in size. Furthermore, to improve efficiency of the converter, there arises a problem that an over-sampling clock signal with a high frequency is required.
Additionally, in an A/D converter of xcex94 modification or an A/D converter of xcex94 xcexa3 modification, it is difficult to obtain a dynamic range or a signal-to-noise ratio equal to or more than 120 dB. Since an analog integrator circuit is employed as an integrator circuit in the A/D converter circuit, it is difficult to conduct a multi-channel A/D conversion using time division.
Although recent high-performance audio apparatuses require 24-bit A/D conversion, the A/D converter circuits of the prior art cannot conduct A/D conversion with a precision of 24 bits.
It is therefore an object of the present invention to provide a high-performance A/D converter circuit for audio apparatuses to thereby remove the difficulties above. 1.
To achieve the object according to the present invention, there is provided, an analog-to-digital (A/D) converter circuit that converts an external analog signal sequentially generated from an external analog signal source into an n-bit digital data signal (n is an integer equal to or more than two), comprising, a digital-to-analog (D/A) converter circuit that converts an n-bit digital data signal into an analog signal and outputting the analog signal from a first output terminal, a comparator that compares a signal level of an external analog signal supplied from an external device with a signal level of the analog signal outputted from the first output terminal, and a digital integrator circuit that digitally integrates a 1-bit digital data signal outputted from said comparator and thereby producing an n-bit digital data signal.
It is therefore possible to conduct an analog-to-digital conversion with a high resolution of 24 bits using a low over-sampling rate (similar to that of the prior art).
Since the A/D converter circuit according to the present invention is a converter of a feedback type, it is possible to prevent deterioration in the monotonous feature, which is a problem of the A/D converter circuit of sequential comparison.
According to the present invention, a digital integrator circuit is used as an integrator circuit of the A/D converter circuit and hence an analog integrator circuit is not required. Therefore, the capacity described above is not required and hence there can be obtained an A/D converter circuit suitable for an LSI circuit.
Since the A/D conversion is carried out using a digital integrator circuit, it is possible to conduct a multichannel A/D conversion using time division.
Since the A/D converter circuit in an embodiment of the present invention is a converter of a feedback type, it is possible to prevent deterioration in the monotonous feature, which is a problem of the A/D converter circuit of sequential comparison.
Since a digital integrator circuit is used as an integrator circuit of the A/D converter circuit in an embodiment of the present invention, an analog integrator circuit is not required and the capacity is not required. Consequently, there can be obtained an A/D converter circuit suitable for an LSI circuit.
Since the A/D conversion is carried out using a digital integrator circuit in an embodiment of the present invention, it is possible to conduct a multi-channel A/D conversion using time division.